Operational transconductance amplifiers (OTAs) are key building blocks for many types of signal processing algorithms realized in CMOS IC technologies. Unfortunately, as transistor dimensions scale downwards with advancing technology developments, so too does their intrinsic voltage gain, which in turn, reduces the upper limit of the open-loop gain achievable by any OTA. Low-gain OTAs have an immediate impact on the absolute accuracy that the system can achieve. If we consider that any time domain specification is a combination of overshoot, settling time, and steady-state error, an ideal system constructed with infinite-gain OTAs can satisfy all three metrics simultaneously, however a system constructed with low-gain OTAs cannot. For the most part, low-overshoot and fast settling time specifications can be met, but the final steady-state error cannot be met. In essence, the system would fail its absolute accuracy requirements.
As OTAs realized in advanced CMOS nodes have very low DC gain, high performance systems constructed with these components will fail to meet their performance expectations. Accordingly, it would be beneficial to provide circuit designers with a methodology for designing and manufacturing ultra-high gain amplifiers.